Special Issue

We are glad to announce the Special Issue on RESCUER (REliable and SeCUrE RISC-V architectures) hosted by the Microprocessors and Microsystems (MICPRO) journal.

Microprocessors and Microsystems Special Issue on RESCUER 2025

In recent years, the open-source and free nature of RISC-V architectures has garnered significant interest from both academia and industry, leading to a surge in innovative applications across various domains. The flexibility and extensibility of RISC-V have enabled researchers and developers to tailor the architecture to specific needs, fostering a vibrant ecosystem of tools and implementations. However, this openness also introduces unique challenges in ensuring the robustness and security of final implementations, which are critical for the deployment of RISC-V in sensitive and high-stakes environments. This special issue seeks to explore comprehensive strategies for mitigating these challenges, focusing on several key areas. First, the development of resilient hardware architectures is essential to withstand faults and attacks, ensuring continuous and reliable operation. Then, the integration of advanced security mechanisms and protocols is crucial to protect against a wide range of threats, from hardware Trojans to side-channel attacks. Finally, the implementation of rigorous testing, verification, and validation methodologies is paramount to identify and address vulnerabilities early in the design and development process. Formal verification methods, simulation-based testing, and real-world case studies will be highlighted to demonstrate the effectiveness of these approaches. The main goal of this special issue is to advance the state-of-the-art in RISC-V security and reliability by providing innovative solutions that can be integrated into real-world RISC-V architectures deployed in critical applications.

We welcome submissions related to advanced applications, architectures, design methods and tools especially related (but not limited) to the following topics:

• Hardware and software reliability and security mechanisms
• Fault detection and fault tolerance techniques
• Formal verification methods
• Secure design practices
• Secure architectures
• Existing and novel attacks to RISC-V architectures
• Radiation analysis of existing RISC-V processor
• Case studies of RISC-V implementations in critical applications

Note: Besides original ideas and regular submissions to this special issue, extended journal versions of papers from the RESCUER 2025 workshop are particularly welcome.

Important Dates:

• Submission Deadline: 26 September 2025
• First Round Decisions: 19 December 2025
• Revised Papers Submission: 20 March 2026
• Decisions for the Revisions: 22 May 2026
• Camera Ready Deadline: 26 June 2026

Guest Editors