Rescuer Logo RESCUER: The first workshop on REliable and SeCUrE RISC-V architectures
29-30 May, 2025, Tallinn, Estonia

Keynotes

speaker1

Dependable computing with Silicon Lifecycle Management

Speaker: Jyotika Athavale

Synopsys

Future vehicles will be based on multi-featured, more centralized compute platforms as a foundation for AI-based functions to enable highly automated driving. More AI based components in future highly automated vehicles impose new risks in the context of automotive safety. This talk will discuss the resiliency challenges for safety critical automotive systems, the benefits of RISC-V architectures for functional safety, and optimizing health of safety critical systems using silicon lifecycle (SLM) based solutions which address aging and degradation challenges for improved overall dependability.

speaker2

Closing holes with open architecture

Speaker: Andrew Dellow

Qualcomm

This talk will describe how RISC-V can be used to build secure, robust systems, focusing on the fantastic progress made by the community over the past year. Ratified extensions such as the control flow integrity protections, and those in the final stages of development like the supervisor domain IDs and their corresponding memory protection tables allow RISC-V implementors to address a full range of threats and build trustworthy and reliable products in an open way like never before.

speaker1

From SPARC to RISC-V: Architecting Intelligent and Dependable Processors for Space Applications

Speaker: Gianluca Furano

European Space Agency

This talk examines the progression of processor technology for space, emphasizing the shift towards the RISC-V Instruction Set Architecture for safety-critical applications. It highlights the unique challenges of the space environment and ESA's move from SPARC-based LEON processors to RISC-V, citing its open-source nature and customization potential. The discussion also covers cybersecurity threats like transient execution attacks and Hardware Trojans, the performance, power, and area trade-offs compared to ARM, and concludes with future directions focusing on security, performance for AI, and fault tolerance for long-term space missions.